1. Field of the Invention
The present invention relates generally to optical communication networks and associated systems, methods and devices. More particularly, embodiments of the invention are concerned with transceivers that achieve relatively high data rates without using CDR signal compensation, while nonetheless maintaining substantial compliance with applicable performance standards.
2. Related Technology
Data can be efficiently propagated through fiber optic networks and devices by the transmission of optical “1” and “0” digital signals. Maintenance of the integrity of the transmitted data, as well as the speed, or rate, at which the data is transferred relies in large part on the timing of the data. That is, the operation of fiber optic data transmission systems is predicated on the ability to reliably ensure that particular bits of data are transmitted at particular times.
To this end, typical fiber optic data transmission systems incorporate a clock signal that defines the time periods in which data is to be transmitted. The clock may be included in the data stream, or may take the form of a separate signal. The use of clock that is common to the transmitter and the receiver means that the same reference is employed for both data transmission and reception processes throughout the data transmission system. By synchronizing the data transmission system operations in this way, a relatively high degree of data integrity can be achieved.
As line rates move higher however, it becomes increasingly likely that the data will get out of sync with the clock, so that the data bits are not being transmitted precisely during the designated bit periods defined by the clock. This phenomenon is sometimes generally referred to as jitter. Jitter can be caused by environmental factors, circuit design, or by the system components themselves. Because no system performs ideally, typical fiber optic data transmission systems are designed to tolerate a certain amount of jitter without experiencing materially adverse effects in terms of overall system performance. The amount of jitter that can be safely tolerated is sometimes referred to as the jitter budget of the system, or of a component. Significant problems may arise however, when the jitter budget is exceeded.
In particular, excessive jitter can result in data pulse overlap so that a particular data pulse moves forward into the preceding data pulse, or backward into the succeeding data pulse. As a result, the receiver may not be able to detect the presence or absence of a particular pulse, and data integrity is lost.
As technology advances and line rates correspondingly increase, jitter presents an increasingly significant problem. Consequently, various devices and systems have been developed in an attempt to maintain jitter and, accordingly, data integrity, at an acceptable level. One approach that has been employed involves the use of circuits that attempt to compensate for jitter by reshaping and retiming the data stream at various points in the fiber optic communications network so that the jitter budget is not exceeded. The processes of reshaping and retiming the data are sometimes collectively referred to as clock and data recovery (“CDR”).
While the CDR approach to jitter compensation has proven useful in some applications, the incorporation of CDR circuits and devices complicates the design, construction, and operation of the transceiver. Correspondingly, the use of CDR circuits and devices also increases the cost of the transceiver. A related problem is that while transceivers exist that do not employ CDR functionality, those transceivers have inherent limitations. In particular, transceivers that do not employ CDR functionality are generally able to avoid the use of CDR circuits and devices because those transceivers operate at relatively low data rates.